index - Equipe System on Chip

 

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Mots clés

Exploration d'architecture Design space exploration Model driven engineering Model Checking URSI Automata Embedded systems Android System-level design Formal verification Interactive Virtualization Formal methods Design SysML-Sec Model-based engineering Analog/Mixed Signal Design Virtual Prototyping FPGA Heterogeneous models Model Mutation CPS Artificial intelligence Immersion Timing analysis UAV Application specific integrated circuits Attacks Model checking Iterative decoding Hardware 3D perception Safety Drone Modeling Cloud computing Model-checking Reliable systems HW Accelerators Design Space Exploration Embedded Systems Models Security Signal processing Costs Formal Methods SysML SDR Behavior Hardware security Simulation Verification Autonomy Hardware Architecture Ingénierie des modèles Virtual prototyping Image processing Autonomous systems Formal Verification Computer architecture ProVerif Disaster management Modelling Execution Trace Analysis Autonomous navigation Cognitive Radio Communications Remote sensing LDPC codes Performance MBSE Analysis Architecture Requirements analysis MDE Model Driven Engineering UML Drones UML/SysML Classification GPR Baseband Processing Coprocessors Code generation DIPLODOCUS Field programmable gate arrays Dependency Graph Integration System-on-Chip Malware HW/SW partitioning Cyber Physical Systems Hardware/software partitioning Cryptography Model development and analysis Hardware/software co-design Model-driven engineering TTool Autonomous vehicles Differential power analysis DPA

 

 

Publications avec texte intégral

109

Références bibliographiques

198

Open access

39 %

Collaborations